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Category Archives for "The Next Platform"

Tuning Up Knights Landing For Gene Sequencing

The Smith-Waterman algorithm has become a linchpin in the rapidly expanding world of bioinformatics, the go-to computational model for DNA sequencing and local sequence alignments. With the growth in recent years in genome research, there has been a sharp increase in the amount of data around genes and proteins that needs to be collected and analyzed, and the 36-year-old Smith-Waterman algorithm is a primary way of sequencing the data.

The key to the algorithm is that rather than examining an entire DNA or protein sequence, Smith-Waterman uses a technique called dynamic programming in which the algorithm looks at segments of

Tuning Up Knights Landing For Gene Sequencing was written by Jeffrey Burt at The Next Platform.

ARM Antes Up For An HPC Software Stack

The HPC community is trying to solve the critical compute challenges of next generation high performance computing and ARM considers itself well-positioned to act as a catalyst in this regard. Applications like machine learning and scientific computing are driving demands for orders of magnitude improvements in capacity, capability and efficiency to achieve exascale computing for next generation deployments.

ARM has been taking a co-design approach with the ecosystem from silicon to system design to application development to provide innovative solutions that address this challenge. The recent Allinea acquisition is one example of ARM’s commitment to HPC, but ARM has worked

ARM Antes Up For An HPC Software Stack was written by Timothy Prickett Morgan at The Next Platform.

3D Stacking Could Boost GPU Machine Learning

Nvidia has staked its growth in the datacenter on machine learning. Over the past few years, the company has rolled out features in its GPUs aimed neural networks and related processing, notably with the “Pascal” generation GPUs with features explicitly designed for the space, such as 16-bit half precision math.

The company is preparing its upcoming “Volta” GPU architecture, which promises to offer significant gains in capabilities. More details on the Volta chip are expected at Nvidia’s annual conference in May. CEO Jen-Hsun Huang late last year spoke to The Next Platform about what he called the upcoming “hyper-Moore’s Law”

3D Stacking Could Boost GPU Machine Learning was written by Jeffrey Burt at The Next Platform.

A Peek Inside Facebook’s Server Fleet Upgrade

Having a proliferation of server makes and models over a span of years in the datacenter is not a huge deal for most enterprises. They cope with the diversity because they support a diversity of application and can kind of keep things isolated and, moreover, IT may be integral to their product or service, but it is usually not the actual product or service that they sell.

Not so with hyperscalers and cloud builders. For them, the IT is the product, and keeping things as monolithic and consistent as possible lowers the cost of goods purchased through higher volumes and

A Peek Inside Facebook’s Server Fleet Upgrade was written by Timothy Prickett Morgan at The Next Platform.

Strong FBI Ties for Next Generation Quantum Computer

It is a good time to be the maker of a machine that excels in large-scale optimization problems for cybersecurity and defense. And it is even better to be the only maker of such a machine at a time when the need for a post-Moore’s Law system is in high demand.

We have already described the U.S. Department of Energy’s drive to place a novel architecture at the heart of one of the future exascale supercomputers, and we have also explored the range of options that might fall under that novel processing umbrella. From neuromorphic chips, deep learning PIM-based architectures,

Strong FBI Ties for Next Generation Quantum Computer was written by Nicole Hemsoth at The Next Platform.

Apache Kafka Gives Large-Scale Image Processing a Boost

The digital world is becoming ever more visual. From webcams and drones to closed-circuit television and high-resolution satellites, the number of images created on a daily basis is increasing and in many cases, these images need to be processed in real- or near-real-time.

This is a computationally-demanding task on multiple axes: both computation and memory. Single-machine environments often lack sufficient memory for processing large, high-resolution streams in real time. Multi-machine environments add communication and coordination overhead. Essentially, the issue is that hardware configurations are often optimized on a single axis. This could be computation (enhanced with accelerators like GPGPUs or

Apache Kafka Gives Large-Scale Image Processing a Boost was written by Nicole Hemsoth at The Next Platform.

Google Courts Enterprise For Cloud Platform

Google has always been a company that thinks big. After all, its mission since Day One was to organize and make accessible all of the world’s information.

The company is going to have to take that same expansive and aggressive approach as it looks to grow in a highly competitive public cloud market that includes a dominant player (Amazon Web Services) and a host of other vendors, including Microsoft, IBM, and Oracle. That’s going to mean expanding its customer base beyond smaller businesses and startups and convincing larger enterprises to store their data and run their workloads on its ever-growing

Google Courts Enterprise For Cloud Platform was written by Jeffrey Burt at The Next Platform.

Windows Server Comes To ARM Chips, But Only For Azure

The rumors have been running around for years, and they turned out to be true. Microsoft, the world’s largest operating system supplier and still the dominant seller of systems software for the datacenter, has indeed been working for years on a port of its Windows Server 2016 operating system to the ARM server chip architecture.

The rumors about Windows Server on ARM started in earnest back in October 2014, which just before Qualcomm threw its hat into the ARM server ring and when Cavium and Applied Micro were in the market and starting to plan the generation of chips

Windows Server Comes To ARM Chips, But Only For Azure was written by Timothy Prickett Morgan at The Next Platform.

Applied Micro Renews ARM Assault On Intel Servers

The lineup of ARM server chip makers has been a somewhat fluid one over the years.

There have been some that have come and gone (pioneer Calxeda was among the first to the party but folded in 2013 after running out of money), some that apparently have looked at the battlefield and chose not to fight (Samsung and Broadcom, after its $37 billion merger with Avago), and others that have made the move into the space only to pull back a bit (AMD a year ago released its ARM-based Opteron A1100 systems-on-a-chip, or SOCs but has since shifted most of

Applied Micro Renews ARM Assault On Intel Servers was written by Jeffrey Burt at The Next Platform.

Google Expands Enterprise Cloud With Machine Learning

Google’s Cloud Platform is the relative newcomer on the public cloud block, and has a way to go before before it is in the same competitive sphere as Amazon Web Services and Microsoft Azure, both of which deliver a broader and deeper range of offerings and larger infrastructures.

Over the past year, Google has promised to rapidly grow the platform’s capabilities and datacenters and has hired a number of executives in hopes of enticing enterprises to bring more of their corporate workloads and data to the cloud.

One area Google is hoping to leverage is the decade-plus of work and

Google Expands Enterprise Cloud With Machine Learning was written by Jeffrey Burt at The Next Platform.

An Early Look at Startup Graphcore’s Deep Learning Chip

As a thought exercise, let’s consider neural networks as massive graphs and begin considering the CPU as a passive slave to some higher order processor—one that can sling itself across multiple points on an ever-expanding network of connections feeding into itself, training, inferencing, and splitting off into multiple models on the same architecture.

Plenty of technical naysay can happen in this concept, of course, and only a slice of it has to do with algorithmic complexity. For one, memory bandwidth is pushed to limit even on specialized devices like GPUs and FPGAs—at least for a neural net problem. And second,

An Early Look at Startup Graphcore’s Deep Learning Chip was written by Nicole Hemsoth at The Next Platform.

ARM And AMD X86 Server Chips Get Mainstream Lift From Microsoft

If you want real competition among vendors who supply stuff to you, then sometimes you have to make it happen by yourself. The hyperscalers and big cloud builders of the world can do that, and increasingly they are taking the initiative and fostering such competition for compute.

With its first generation of Open Cloud Servers, which were conceptualized in 2012, put into production for its Azure public cloud in early 2013, and open sourced through the Open Compute Project in January 2014, Microsoft decided to leverage the power of the open source hardware community to make its own server

ARM And AMD X86 Server Chips Get Mainstream Lift From Microsoft was written by Timothy Prickett Morgan at The Next Platform.

How AMD’s Naples X86 Server Chip Stacks Up To Intel’s Xeons

Ever so slowly, and not so fast as to give competitor Intel too much information about what it is up to, but just fast enough to build interest in the years of engineering smarts that has gone into its forthcoming “Naples” X86 server processor, AMD is lifting the veil on the product that will bring it back into the datacenter and that will bring direct competition to the Xeon platform that dominates modern computing infrastructure.

It has been a bit of a rolling thunder revelation of information about the Zen core used in the “Naples” server chip, the brand of

How AMD’s Naples X86 Server Chip Stacks Up To Intel’s Xeons was written by Timothy Prickett Morgan at The Next Platform.

High Times for Low-Precision Hardware

Processor makers are pushing down the precision for a range of new and forthcoming devices, driven by a need that balances accuracy with energy-efficient performance for an emerging set of workloads.

While there will always be plenty of room at the server table for double-precision requirements, especially in high performance computing (HPC). machine learning and deep learning are spurring a fresh take on processor architecture—a fact that will have a trickle-down (or up, depending on how you consider it) effect on the hardware ecosystem in the next few years.

In the last year alone, the emphasis on lowering precision has

High Times for Low-Precision Hardware was written by Nicole Hemsoth at The Next Platform.

The Rise of Flash Native Cache

Burst buffers are growing up—and growing out of the traditional realm of large-scale supercomputers, where they were devised primarily to solve the problems of failure at scale.

As we described in an interview with the creator of the burst buffer concept, Los Alamos National Lab’s Gary Grider, the “simple” problem of checkpointing and restarting a massive system after a crash with a fast caching layer would be more important as system sizes expanded—but the same approach could also extend to application acceleration. As the notion of burst buffers expanded beyond HPC, companies like EMC/NetApp, Cray, and DataDirect Networks (DDN)

The Rise of Flash Native Cache was written by Nicole Hemsoth at The Next Platform.

Naples Opterons Give AMD A Second Chance In Servers

There are not a lot of second chances in the IT racket. AMD wants one, and we think, has earned one.

Such second chances are hard to come by, and we can rattle off a few of them because they are so rare. Intel pivoted from a memory maker to a processor maker in the mid-1980s, and has come to dominate compute in everything but handheld devices. In the mid-1990s, IBM failed to understand the RISC/Unix and X86 server waves swamping the datacenter and nearly went bankrupt and salvaged itself as software and services provider to glass houses. A decade

Naples Opterons Give AMD A Second Chance In Servers was written by Timothy Prickett Morgan at The Next Platform.

Stanford’s TETRIS Clears Blocks for 3D Memory Based Deep Learning

The need for speed to process neural networks is far less a matter of processor capabilities and much more a function of memory bandwidth. As the compute capability rises, so too does the need to keep the chips fed with data—something that often requires going off chip to memory. That not only comes with a performance penalty, but an efficiency hit as well, which explains why so many efforts are being made to either speed that connection to off-chip memory or, more efficiently, doing as much in memory as possible.

The advent of 3D or stacked memory opens new doors,

Stanford’s TETRIS Clears Blocks for 3D Memory Based Deep Learning was written by Nicole Hemsoth at The Next Platform.

Japan to Unveil Pascal GPU-Based AI Supercomputer

A shared appetite for high performance computing hardware and frameworks is pushing both supercomputing and deep learning into the same territory. This has been happening in earnest over the last year, and while most efforts have been confined to software and applications research, some supercomputer centers are spinning out new machines dedicated exclusively to deep learning.

When it comes to such supercomputing sites on the bleeding edge, Japan’s RIKEN Advanced Institute for Computational Science is at the top of the list. The center’s Fujitsu-built K Computer is the seventh fastest machine on the planet according to the Top 500 rankings

Japan to Unveil Pascal GPU-Based AI Supercomputer was written by Nicole Hemsoth at The Next Platform.

CPU, GPU Potential for Visualization and Irregular Code

Conventional wisdom says that choosing between a GPU versus CPU architecture for running scientific visualization workloads or irregular code is easy. GPUs have long been the go-to solution, although recent research shows how the status quo could be shifting.

At SC 16 in Salt Lake City in a talk called CPUs versus GPUs, Dr. Aaron Knoll of the University of Utah, and Professor Hiroshi Nakashima of Kyoto University, presented comparisons of various CPU and GPU-based architectures running visualizations and irregular code. Notably, both researchers have found that Intel Xeon Phi processor-based systems show stand-out performance compared to GPUs for

CPU, GPU Potential for Visualization and Irregular Code was written by Nicole Hemsoth at The Next Platform.

For Big Banks, Regulation is the Mother of GPU Invention

There is something to be said for being at the right place at the right time.

While there were plenty of folks who were in the exact wrong spot when the financial crisis hit in 2007-2008, some technologies were uniquely well timed to meet the unexpected demands of a new era.

In the aftermath of the crash, major investment banks and financial institutions had a tough task ahead to keep up with the wave of regulations instituted to keep them straight. This has some serious procedural impacts, and also came with some heady new demands on compute infrastructure. Post-regulation, investment

For Big Banks, Regulation is the Mother of GPU Invention was written by Nicole Hemsoth at The Next Platform.