Memory at the Core of New Deep Learning Research Chip
Over the last two years, there has been a push for novel architectures to feed the needs of machine learning and more specifically, deep neural networks.
We have covered the many architectural options for both the training and inference sides of that workload here at The Next Platform, and in doing so, started to notice an interesting trend. Some companies with custom ASICs targeted at that market seemed to be developing along a common thread—using memory as the target for processing.
Processing in memory (PIM) architectures are certainly nothing new, but because the relatively simple logic units inside of …
Memory at the Core of New Deep Learning Research Chip was written by Nicole Hemsoth at The Next Platform.


