First In-Depth View of Wave Computing’s DPU Architecture, Systems
Propping up a successful silicon startup is no simple feat, but venture-backed Wave Computing has managed to hold its own in the small but critical AI training chip market–so far.
Seven years after its founding and the company’s early access program for beta machines based on its novel DPU manycore architecture is now open, which is prompting Wave to be more forthcoming about the system and chip architecture for deep learning-focused dataflow architecture.
Dr. Chris Nicol, Wave Computing CTO and lead architect of the Dataflow Processing Unit (DPU) admitted to the crowd at Hot Chips this week that maintaining funding …
First In-Depth View of Wave Computing’s DPU Architecture, Systems was written by Nicole Hemsoth at The Next Platform.
Huawei's MEC@CloudEdge technology uses a cloud-native architecture.
Disaster Recovery with VMware NSX-V and Zerto Note, this is a reposting of the blog that I initially posted here on humairahmed.com. In a prior blog, VMware NSX and SRM: Disaster Recovery Overview and Demo, I described and demoed how VMware NSX and SRM with vSphere Replication combined provide for an enhanced disaster recovery (DR) solution. SRM... 






